What We Heard at Advancing AI 2026, and What We're Building With AMD
This week our team joined AMD in San Francisco for Advancing AI 2026. We came with news of our own: a new reference architecture pairing the Cornelis CN6000 SuperNIC with AMD EPYCTM Venice processors and AMD InstinctTM MI400 series accelerators. It’s a blueprint our customers and OEM partners can use to build AMD-based AI systems where the network keeps pace with the compute.
We left with a full week of conversations that confirmed why we built it. Before I get to those, credit where it belongs. This was AMD's biggest Advancing AI yet, and Dr. Lisa Su and her team laid out a vision of the AI market that is bolder than what most of the industry was projecting even a year ago. Five years into our collaboration with AMD, with more than 25 validated platform configurations behind us and a joint HPC Center of Excellence in Munich, weeks like this one are why the collaboration works. We are building toward the same future.
Inference is now the main event
The number from the keynote that stuck with me: AMD projected that 2026 is the first year the world is using more AI compute to run models than to train them, roughly 60 percent of global capacity. Token consumption has grown about 160 times in two years. AMD tied much of that growth to the rise of agentic AI, where models reason, retrieve information, and complete multi-step tasks rather than simply generate responses.
Here is what that means for anyone planning infrastructure. The systems being designed today will spend most of their lives serving models, and with disaggregated inference, serving no longer happens on one machine. A request gets routed, its context gets built, and its answer gets generated, often across different systems that hand work to each other over the network. When the network slows that hand-off down, the most expensive equipment in the datacenter sits and waits. Customers experience that as higher infrastructure costs, while end users experience it as a delay or poorer application performance.
One theme echoed throughout the event was that AI infrastructure can no longer be designed component by component. CPUs, GPUs, networking, memory, and software increasingly have to be treated in one integrated system.
It came up in nearly every discussion our team had at the show, and it is exactly the problem our reference architecture exists to solve.
Agents are changing what customers ask us to build
AMD also raised its outlook for the server CPU market, from roughly $25 billion today to more than $200 billion by 2030, driven by agentic AI. They went a step further and described a new class of server built for agent workloads, dense CPU systems that run the reasoning loops, tool calls, and data retrieval that surround every model.
That matched what we hear from our own customers, and it is why our reference architecture treats the CPU tier as a pool of its own. Alongside GPU pools for building context and generating tokens, we are defining a Venice-based pool for agent orchestration, routing, and retrieval, sized to grow in step with the others. Agents multiply the traffic between all three pools, and a 256-core Venice socket can put more of that traffic on the network than any CPU before it. We designed our CN6000 SuperNIC to stay ahead of what that socket can drive. It matches the new bus speeds of these new PCIe Gen 6.0 Venice systems and has an industry-leading design target of 1.6 billion messages per second, with ultra-low latency. Customers should never face a choice between scaling nodes and a responsive network. We built the CN6000 so they don't.
Open standards are how everyone gets to build
The theme I appreciated most from the keynote was AMD's continued commitment to open platforms, in hardware standards like Ultra Ethernet and in software through ROCm. AMD is driving an open ecosystem for AI infrastructure and Cornelis is proud to be building in it alongside them.
We have put our own work behind that commitment for years. Cornelis is a key contributor to libfabric, the open fabric interface the Ultra Ethernet Consortium has now adopted. Applications built on MPI, OpenSHMEM, and RCCL run on our fabric without code changes. For customers, the payoff is practical, they choose their processors, their accelerators, their fabric, and their software on the merits. They keep that choice as their systems grow and their workloads evolve. Open standards are what turn a market this size into an opportunity for everyone building in it, from OEMs and enterprises to HPC centers, sovereign AI programs, and cloud providers.
What comes next
Our announcement last week was the starting line, not the finish. Between now and the second half of 2026, when both the CN6000 and Venice arrive, we are working with our OEM partners to validate the full architecture, and we will share those results this fall at the AI Infra Summit and OCP Global Summit.
Our thanks to AMD for another great week and to the customers and partners who spent time with us. The market numbers on that stage were remarkable, but numbers alone do not build anything. The winners of this cycle will be the companies that help customers turn infrastructure into results, and that work goes faster when we do it together.